1. Field of the Disclosure
The present disclosure relates to a measurement apparatus that sequentially switches between analog input signals of a plurality of channels and internal calibration signals using a multiplexer, performs digital conversion on the signals using an AD converter, and inputs the signals to a digital processing device.
2. Description of the Related Art
In a measurement apparatus, analog input signals of a plurality of channels are switched between by a multiplexer, digital conversion is performed by one AD converter, and the signals are input to a digital processing device, thereby decreasing the cost per channel.
FIG. 3 is a functional block diagram illustrating an example of the configuration of a measurement apparatus of the related art. A measurement apparatus 1 indicated by a block illustrated using a solid line receives signals S1 to S4 from external analog signal sources 11 to 14 indicated by channels CH1, CH2, CH3, and CH4, and signals C1 and C2 from calibration signal sources 21 and 22 indicated by calibration channels CAL1 and CAL2, and sequentially switches between these signals using a multiplexer 30.
The signals that are switched by the multiplexer 30 are sequentially converted into digital values by one AD converter 40 and are input to a digital processor 50. Signal processor 51 performs a predetermined computation process and the like, and outputs signals to an external device through output interface 52.
Signals S1 to S4 of analog signal sources 11 to 14 indicated by channels CH1 to CH4 indicate a voltage value, an electrical current value, or a resistance value indicating the measured value of the physical quantity. Signals C1 and C2 from the calibration signal sources 21 and 22 indicated by calibration channels CAL1 and CAL2 indicate zero adjustment signals, span adjustment signals, or internal terminal temperature signals.
FIG. 4 is a flowchart illustrating the operation procedure of an apparatus of the related art. In step S101, the apparatus processes an input signal of the channel CH1, processes input signals of the channels CH2 to CH4 in steps S102 to S104, respectively, and processes an internal calibration signal in step S105. The process then returns to step S101.
FIG. 5 is a flowchart illustrating the operation procedure of the apparatus of the related art. In order to shorten the time taken for the signal processing of the channel CH1, the measurement for the channels CH2 to CH4 are skipped. The apparatus processes the input signal of the channel CH1 in step S110, and processes the internal calibration signal in step S111. The process then returns to step S110.
Japanese Unexamined Patent Application Publication No. 2010-015921 is an example of related art.